1. Field of the Invention
The present invention relates to a bipolar transistor and a method for fabricating the same and, specifically, a SiGe bipolar complementary metal oxide semiconductor (BiCMOS) device integrated on a silicon on insulator (SOI) and a method for fabricating the same.
2. Description of the Prior Art
In the past days, gallium arsenide (GaAs) compound semiconductors have been widely used in the fabrication of radio frequency (RF) devices for information communications, and CMOS devices have been widely used in the fabrication of analog/digital circuits. In the recent days, an RF/analog/digital integration chip (SoC: system on chip) has been widely used, and silicon germanium (SiGe) BiCMOS devices are most suitable for it's manufacturing purpose and thus widely used.
SiGe BiCMOS technology is that a SiGe heterojunction bipolar transistor (HBT) suitable for RF/analog circuits and a CMOS device suitable for digital circuits are both integrated on a single substrate, nowadays the SiGe BiCMOS technology has been employed for the integration chip fabrication of an information communication apparatus such as a portable mobile phone, and then the SiGe BiCMOS is a widespread technology.
The SiGe HBT is a technology that has been improved from a conventional bipolar transistor, and makes use of not silicon (Si) but a SiGe alloy material that Si is intermixed with Ge of about 20%, as a base. The SiGe HBT, as compared with a conventional bipolar transistor, has advantages that large current gain can be obtained, and its base can be formed thin by increasing the impurity concentration thereof by about 100 times, thus it is possible to operate at a high speed and a high frequency. However, a SiGe BiCMOS device fabricated in accordance with the conventional art, as compared with a CMOS device, has problems that the process is more complex and the production cost is higher because of requiring 10 or more sheets of mask additionally, and that the integration capability of the SiGe BiCMOS device is not as high as that of the CMOS device because devices of the HBT are not downsized. To overcome these problems, an integration chip composed of either only a CMOS device or only a silicon on insulator (SOI) CMOS device having low power consumption among CMOS devices, has been developed by a number of universities, etc. However, the integration chip has a problem that its performance is insufficient due to the restricted properties of the CMOS devices.